Senior ASIC Verification Architect — AI/ML TPU Hardware

A leading tech company in Sunnyvale, CA, is seeking a Mid-level Design Verification Engineer. In this role, you will shape cutting-edge TPU technology for AI/ML applications. You will be responsible for verifying complex digital designs, collaborating with design teams, and utilizing your expertise in SystemVerilog and UVM. The position requires at least 8 years of experience in design verification and offers a competitive salary range of $156,000-$229,000 plus bonuses and benefits. #J-18808-Ljbffr